0-1 years of experience
Concerned about your lack of experience? Learn More...
Employment Type:
Full time
Job Category:
Associate Rotation Engineer - DVT - 5262
(This job is no longer available)
Mentor Graphics | Wilsonville, OR
Grad Date

Not sure what types of jobs you are interested in?

Explore Jobs
Based on Your Education

Follow This Company

Job Description

Company: Mentor Graphics

Job Title: Associate Rotation Engineer - DVT - 5262

Job Location: US - OR - Wilsonville

Job Category: College

All qualified applicants will receive consideration for employment without regard to race, sex, sexual orientation, gender expression or identity, color, religion, national origin, disability or protected veteran status.

Job Duties:

Please note: Target start dates for this position is Spring/Summer 2017


In this position, you will be involved in a structured Associate Rotation Engineer Training Program. This is a fast-track training program that challenges you to develop the expertise needed to solve difficult technical problems.

Associate Rotational Engineers are members of a team of highly motivated individuals working with customers designing the most complex hardware and software systems in the world and whose applications span the electronics industry. This training program will give you unique insight into our technical marketing and product support divisions as well as our sales organization. Upon successful completion of the training program, you will be eligible to advance into one of these organizations. Post program opportunities include Field Application Engineer, Corporate Applications Engineer and Technical Marketing Engineer positions.

Job Qualifications:

US Citizenship - must be fully eligible to obtain U.S Security Clearance

New graduate (2017) BS or MS (Master's degree is preferred) in Electrical or Computer Engineering. Programming skills in C/C++, Tcl/TK, PERL as well as an understanding of object oriented concepts as applied to a Verification Environment. Coursework/Experience with HDL-based, register-transfer-level (RTL), digital logic design, verification languages, and functional verification methodology, for ASICs and/or FPGAs. This experience/coursework should include some or all of the following: testbench architecture, design and implementation using UVM/OVM/AVM verification methodology,VHDL and/or Verilog HDL simulation, SystemVerilog, Specman/e, Vera and/or PSL and Assertion-Based Verification techniques. Experience in constrained random directed testing, is also desirable. Excellent verbal and written communication skills; very self-motivated and results-oriented. Travel may be required. Ability to relocate if needed.

This position may require access to export-controlled technology. If an export license is required and Mentor Graphics elects to apply for such a license, then candidates must be approved and licensed by the applicable government authorities as a condition of employment.