No experience
Employment Type:
Full time
Job Category:
Engineer I, Digital FPGA Engineering
(This job is no longer available)
Seakr | Centennial, CO
Grad Date

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Job Description

Seeking an Engineer I who has a fundamental knowledge of digital circuit design, state machines, boolean math and understanding of FPGA fundamentals. Working knowledge of Verilog and/or VHDL design languages is required. Ability to run digital simulators to debug RTL design code is a plus. Working knowledge of Perl and/or Python scripting languages is a plus. Clear written and verbal communication is required. Experience with design-to-gates (synthesis results) translation/synthesis is a plus. Candidate shall have experience solving basic digital lab debug problems with use of lab tools such as bench supplies, scopes, and logic analyzers. Must be able to integrate within a team environment. BSEE or MSEE is required. This is an entry level position.

About Seakr

Founded in 1982, SEAKR Engineering, Incorporated, is primarily engaged in the development, manufacture, and sale of advanced technology solid-state data processing and mass storage systems for aerospace, military and rugged applications. SEAKR has a reputation for high-level performance and reliability in severe environments, and is the leading provider of space-based solid-state data recording and processing systems. SEAKR has designed and built over 80 memory/processing systems. 39 have launched and all have performed flawlessly, with Bit Error Rates of zero, on flights ranging from low earth orbit to interplanetary missions. SEAKR has been credited with pioneering the Spacecraft Solid State Memory (SSSM) market by building small 100 Mbit systems, and has evolved its designs to current deliverable capacities well over a terabit.