Experience:
No experience
Employment Type:
Intern/Co-op
Posted:
9/6/2019
Job Category:
Design
Design Methodology Intern
(This job is no longer available)
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Job Description

Position Summary

1. Understand semiconductor processing. Design an optimal chip-level integrated circuit according to a product's requirements.

2. Verify functions and performances by modeling a hardware system and building a verification environment.

Role and Responsibilities

Samsung is a world leader in Memory, LCD and System LSI technologies. We are currently looking for exceptional software and hardware talent to join our Samsung Austin R & D Center (SARC) in Austin, TX and our Advanced Computing Lab (ACL) in San Jose, CA. SARC was established in Austin, TX in 2010 to be one of Samsung's strategic investments in high performance low power ARM based processors. Our CPU design teams develop IP for Samsung mobile products and their Application Processor (AP). Our GPU design teams, located in Austin (SARC) and San Jose (ACL), are developing a custom GPU that will be deployed in Samsung mobile products.

We're seeking Design Automation/CAD interns interested in working on front end or

back-end flows supporting high performance CPU and GPU development. Responsibilities will include supporting a mix of in-house developed tools and vendor tools. Technology areas include:

* Power Integrity design and analysis methodology
* Stdcell and memory design
* Design kit generation and validation
* Physical Implementation Signoff
* Static Timing Analysis
* Synthesis and formal verification
* Low Power Design
* Placement and routing

The qualified candidate will possess the following:

* Pursuing a degree in Electrical Engineering, Computer Engineering or related field of study with a minimum of 3.5 GPA and 0+ years of experience.
* Digital design, transistor level design fundamentals and methodology thru coursework or otherwise.
* Must have developed scripts in python, ruby, other scripting languages as part of course/project work or past work experience.
* C++ or other programming language experience is a plus
* Proven microarchitecture design knowledge
* Verilog / System Verilog coding skill for the quality RTL expected
* General understanding and knowledge of low power design methodology
* Good understanding of RTL verification/debug flow and environments (e.g., UVM/OVM, hardware modeling, assertions and formal verification)
* Good written/verbal communication skills, strong team work
* Motivated, self-directed and able to work effectively, both independently and in a team.

Skills and Qualifications

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